Literals
- ou:tipoPublicacion
- Article
- bibo:issn
- 0026-2692
- vivo:identifier
- 1997-82
- fabio:hasPublicationYear
- 1997
- bibo:doi
- 10.1016/s0026-2692(96)00063-8
- dcterms:creator
- Lanchares J.
- ou:eid
- 2-s2.0-0031078936
- dcterms:contributor
- bibo:page_range
- 143-150
- dcterms:publisher
- Microelectronics Journal
- dcterms:title
- A method for multiple-level logic synthesis based on the simulated annealing algorithm
- vcard:url
- ou:urlScopus
- ou:vecesCitado
- 4
- bibo:volume
- 28
Inverse Relations
- Has related: ou:tienePublicacion