PARISIAN APPROACH Reducing Computational Effort to Improve SMT Performance by setting Resizable Caches

Literals

• bibo:doi
  • 10.5220/0003113702750280
• dcterms:creator
  • Díaz J.
• dcterms:contributor
  • Diaz J.; de Vega F.F.; Ignacio Hidalgo J.; Garnica O.
• vivo:identifier
  • 2010-2708
• bibo:isbn
  • 9789898425317
• fabio:hasPublicationYear
  • 2010
• ou:eid
  • 2-s2.0-105001919514
• bibo:eissn
  • 2184-3236
• bibo:page_range
  • 275-280
• dcterms:publisher
  • International Joint Conference on Computational Intelligence
• ou:tipoPublicacion
  • Conference Paper
• dcterms:title
  • PARISIAN APPROACH Reducing Computational Effort to Improve SMT Performance by setting Resizable Caches
• vcard:url
  • https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=105001919514&origin=inward
• ou:urlScopus
  • https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=105001919514&origin=inward
• ou:vecesCitado
  • 0
• bibo:volume
  • 1

Typed Literals

• dcterms:created
  • 2010-01-01T00:00:00 (xsd:dateTime)
• ou:openaccess
  • True (xsd:boolean)

Inverse Relations

• Has related: ou:tienePublicacion
  • FRANCISCO FERNÁNDEZ DE VEGA