PUBLICACIÓN
A methodology for modeling and simulation of saturated cores fault current limiters
Vilhena, N., Arsenio, P., Murta-Pina, J., Pronto, A., Alvarez, A.
2015
DOI
10.1109/tasc.2014.2374179
EID
2-s2.0-84922789942
BIBTEX
@article{Álvarez-García2015,title = {A methodology for modeling and simulation of saturated cores fault current limiters},journal = {IEEE Transactions on Applied Superconductivity},year = {2015},volume = {25},number = {3},author = {Vilhena, N. and Arsenio, P. and Murta-Pina, J. and Pronto, A. and Alvarez, A.}}
AUTORES DE LA UEX